Interfacing LED with DE0 Nano FPGA

Introduction

One of the first experiments often done when learning Verilog and FPGA programming is implementing a blinking LED on an FPGA board. This experiment serves as an excellent introductory project because it allows beginners to grasp fundamental concepts of digital design and I/O interfacing. The blinking LED experiment demonstrates how to control an external output device, in this case, an LED, using the FPGA's I/O pin. It involves understanding the basic structure of a Verilog module, designing a simple finite state machine or counter for timing, and mapping the output signals to the appropriate I/O pin connected to the LED.

Problem statement

Blinking an LED on FPGA DE0 Nano.

Requirements

FPGA DE0 Nano.

Working

The blinking LED in an FPGA DE0 Nano using Verilog involves several essential steps. First, the I/O pin on the FPGA board that will be connected to the LED is defined as an output port in the Verilog module. Next, a counter is implemented to generate a time delay for the blinking effect. A flip-flop is then utilized to toggle its output state based on the counter value. This flip-flop acts as a memory element and changes its state each time the counter reaches its maximum value. The output of the flip-flop is mapped to the designated LED I/O pin using a Verilog assignment statement. The Verilog code is then synthesized and implemented using FPGA design tools provided by the DE0 Nano manufacturer, resulting in a bitstream that is loaded onto the FPGA board. Once the bitstream is loaded, the FPGA executes the Verilog code, causing the LED connected to the specified I/O pin to blink according to the defined timing and toggle logic.

Code

Copy and paste the following code into blinkled.v or download it from here:

module blinkled (input  clk, output out);
  reg [31:0] counter;
  reg LED;

  initial begin
    LED = 1'b0;
    counter = 32'b0;
  end

  always @(posedge clk) begin
    if (counter < 25000000) counter <= counter + 1'b1;
    else begin
      LED <= ~LED;
      counter <= 32'b0;
    end
  end

  assign out = LED;

endmodule

Navigate to Following:

Assignment --> Pin-Planner

or you can directly get the pin-planner shortcut as shown below in quartus interface:

or press Ctrl+Shift+N.

Following window will appear:

Enter the location for the node names as mentioned below.

1. clk assigned to PIN_R8.
2. out assigned to PIN_A15.

For Hardware Seup refer DE0 Nano Manual

After typing in the location pin of Input, close the window.

Next step is to compile it again by using the start compilation button on the menu bar.

After successful compilation click on the programmer button on menu bar.

You will be taken to a new window as shown below.

Setup USB-Blaster:

for Windows user - click here. for Linux user do the following:

create a file named "51-usbblaster.rules" in "/etc/udev/rules.d/" using following command:

sudo touch /etc/udev/rules.d/51-usbblaster.rules

Add following lines in file:

# USB Blaster

SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6001", MODE="0666", NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}", RUN+="/bin/chmod 0666 %c"
SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6002", MODE="0666", NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}", RUN+="/bin/chmod 0666 %c"
SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6003", MODE="0666", NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}", RUN+="/bin/chmod 0666 %c"

# USB Blaster II

SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6010", MODE="0666", NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}", RUN+="/bin/chmod 0666 %c"
SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6810", MODE="0666", NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}", RUN+="/bin/chmod 0666 %c"

Create a new file named "usbblaster.rules" in same directory (/etc/udev/rules.d/) and add following content:

Note: Add your laptop's username in GROUP in place of <user-name>.

ATTR{idVendor}=="09fb", ATTR{idProduct}=="6001", GROUP="<user-name>"

restart udev using following command:

sudo service udev restart

After setting up USB-Blaster, Click on Hardware Setup and Select USB-Blaster in currently selected hardware as shown below and close window.

Click on the start button and you should see the progress as 100% (Successful) as shown below.

Output

This code implements a simple blinking of inbuilt LED functionality on an FPGA board. The LED(LED[0]) turns on and off periodically based on the clock signal, with a toggle rate controlled by the counter value.

Conclusion

From this Verilog code for interfacing an LED in the DE0 Nano FPGA, we learned several key concepts. Firstly, we saw how to initialize and control signals using Verilog syntax, including the input (clk) and output (out) ports. We observed the use of a clock signal to synchronize the blinking of the LED. The counter was used to determine the toggle rate of the LED, allowing for a specific blinking frequency. We also witnessed the usage of if-else conditions to handle the toggle action. Lastly, we gained insights into assigning the LED output value to the designated output port using the assign statement. Overall, this code demonstrated the fundamentals of interfacing an LED with an FPGA using Verilog, showcasing how to control the LED's blinking behavior based on the clock signal.